| Title |
Poly-Si Thin Film Transistor with poly-Si/a-Si Double Active Layer Fabricated by Employing Native Oxide and Excimer Laser Annealing |
| Authors |
박기찬(Park, Gi-Chan) ; 박진우(Park, Jin-U) ; 정상훈(Jeong, Sang-Hun) ; 한민구(Han, Min-Gu) |
| Keywords |
excimer laser annealing ; poly-Si TFT ; leakage current ; a-Si offset stability |
| Abstract |
We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%. |