| Title |
CMOS Logic Circuits with Lower Subthreshold Leakage Current |
| Keywords |
CMOS ; Subthreshold ; Leakage Current ; Logic Circuit ; Inverter |
| Abstract |
We propose a new method to reduce the subthreshold leakage current. By moving the operating point of OFF state MOSFETs through input-controlled voltage generators, logic circuits with much lower leakage current can be built with few extra components. SPICE simulation results for the new inverter show correct logic results without speed degradation compared to a conventional inverter. |