| Title |
A Delay Estimation Method using Reduced Model of RLC Interconnects |
| Authors |
정문성(Jung Mun-Sung) ; 김기영(Kim Ki-Young) ; 김석윤(Kim Seok-Yoon) |
| Keywords |
RLC Delay ; Interconnect Delay ; Inductance ; Reduced Model ; Equivalent Elmore Delay |
| Abstract |
This paper proposes a new method for delay time calculation in RLC interconnects. This method is simple, but precise. The proposed method can calculate delay time of RLC interconnects by simple numerical formula calculation without complex moment calculation using reduced model in RLC interconnects. The results using the proposed method for RLC circuits show that average relative error is within 10 % in comparison with HSPICE simulation results. |