| Title |
Optimization Design Method for Inner Product Using CSHM Algorithm and its Application to 1-D DCT Processor |
| Keywords |
승산기 ; 연산공유 승산기 ; DCT 프로세서 Multiplier ; Computation Sharing Multiplier ; DCT processor |
| Abstract |
The DCT algorithm needs an efficient hardware architecture to compute inner product. The conventional design method, like ROM-based DA(Distributed Arithmetic), has large hardware complexity. Because of this reason, a CSHM(Computation Sharing Multiplication) was proposed for implementing inner product by Park. However, the Park's CSHM has inefficient hardware architecture in the precomputer and select units. Therefore it degrades the performance of the multiplier. In this paper, we presents the optimization design method for inner product using CSHM algorithm and applied it to implementation of 1-D DCT processor. The experimental results show that the proposed multiplier is more efficient than Park's when hardware architectures and logic synthesis results were compared. The designed 1-D DCT processor by using proposed design method is more high performance than typical methods. |