| Title |
A Design of Reliable 1.2 kV SiC MOSFET against Process Deviation |
| Authors |
윤효원(Hyowon Yoon) ; 김채윤(Chaeyun Kim) ; 박영은(Yeongeun Park) ; 김광재(Gwangjae Kim) ; 강규혁(Gyuhyeok Kang) ; 석오균(Ogyun Seok) |
| DOI |
https://doi.org/10.5370/KIEE.2022.71.6.871 |
| Keywords |
SiC; MOSFET; Process deviation; Retro-grade; RA-JTE |
| Abstract |
A design of a 1.2 kV SiC MOSFET for reliable characteristics against process dispersion is presented. The profile of p-base concentration was designed in consideration of incomplete ionization and electric field crowding at the gate oxide. The structure of RA-JTE was optimized in consideration of surface charge density and critical dimension. The 1.2 kV SiC MOSFET with the optimized design parameters showed reliable characteristics against process dispersion. |