1. Introduction

The global development in industrialization increases energy consumption, resulting in the continued usage of fossil fuels. Rising carbon dioxide emissions from the combustion of fossil fuels have accelerated global warming, causing major environmental concerns. Electricity generated from renewable energy sources like photovoltaic (PV), wind, or biomass might take the place of fossil fuel-based electricity generation. The design of a grid-connected converter, as depicted in Fig. 1, is critical for such systems because it supplies stable AC power to the grid and loads from the DC power of the renewable energy source.

The increasing use of power semiconductor devices is known to cause serious problems in the electric power system. The power semiconductor devices play an important role in the power converters but are the most fragile component ⁽¹⁾. As a result, the power semiconductor components have a significant impact on the dependability of power converters, which necessitates a high-reliability standard for the power converter. According to ⁽²⁾, the failures in a power semiconductor device are mostly caused by thermal stress, accounting for 60\%. ATC is a recently introduced technique for adjusting power losses and thermal stress. The basic approach is to use thermal control to influence the power losses within the power converter. The reduction of the power losses results in a decrease in the average temperature and thermal cycles. Using a classification approach based on converter types, the author in ⁽³⁾ examines the ATC techniques by classifying ATC according to the various converter kinds. Adjusting converter's switching frequencies are the most common and easy method for achieving thermal management, which has a direct influence on power losses without significantly affecting the power system's operational state. By reducing the operation switching frequency, the switching losses of the converter decrease, resulting in the reduction of power losses ⁽³⁾. A different ATC scheme is to modify the modulation methods. This strategy is usually applied in multilevel converters where the available redundant switching states reduce the switching losses or conduction losses ⁽³⁾. The discontinuous PWM (DPWM) is a well-known strategy whose basic concept is to clamp the voltage reference of the converter output to the upper or lower DC-link potential for a predetermined interval so that the corresponding power device maintains its status without switching, thereby mitigating switching loss in that interval. Due to the reduced power device loss during the clamping time, the junction temperature mean value and variance are also lowered. Switching frequency is typically used to influence converter junction temperature, which can have a negative impact on output performance in low-level systems. The ATC strategies using a modified modulation method can reduce the power loss of the specific stressful device but are complicated. However, these ATC approaches do not take into consideration that the phase legs of the converter can have different aging conditions. For power semiconductors, manufacturing techniques have been recognized as a possible source of failure. It leads to a typical distortion in the quality of the components, which results in different aging conditions. In order to improve the performance of the three-phase converter, phase legs are supplied with varying amounts of electricity based on their respective aging conditions. The goal is to avoid or postpone as much as possible any failures. The aging condition can be observed ⁽⁴⁾, and the power is distributed accordingly, whereby more aged phase leg is supplied less power or even no power. In this way, the power-dependent failures in the phase legs are delayed. In the case that the phase leg can just supply part power to the corresponding load, the grid will provide the rest power of the load, as shown in Fig. 1. This is equivalent to unbalanced load condition in practical situations ⁽⁵⁾. As a critical component of power distribution, the three-phase converter should be able to provide an unbalanced load in islanding mode and deliver regulated AC voltages due to this evolution of the custom power concept for each phase leg.

There are two primary topologies for a three-phase four-wire system that improves a three-phase converter power quality while it is operating in an unbalanced operation. In comparison to the three-leg converter, the three-phase four-leg converter feeds a three-phase unbalanced load more efficiently because the midpoint of the additional leg and the neutral point of the three-phase load is connected to a common point, allowing the negative sequence current path to be controlled by dual current controllers, and the topology is straightforward ⁽⁶⁾. This topology, however, may pose an electromagnetic compatibility issue for the neutral point, which is susceptible to high-frequency voltage transitions. In addition, the fourth leg control system is sophisticated, and it cannot be operated separately. As mentioned in the literature, the corresponding controller is likewise challenging to develop. The split dc-link capacitor three-phase converter can also accomplish a three-phase four-wire structure, enabling a loop for the neutral current, which increases the converter capability to feed unbalanced loads ⁽⁷⁾. When the neutral point voltage is steady, the split dc-link capacitor three-phase converter can be considered equivalent to three single-phase half-bridge converters, which can be used to decouple the three-phase converter. Thus, the three-phase can be controlled separately, effectively inhibiting the output voltage asymmetry induced by an unbalanced load ⁽⁸⁾. However, the existence of the capacitor voltage division problem caused by the neutral current flowing into the capacitor or the difference between the two capacitors limits the range of applications for this split dc-link capacitor, and a higher capacitance is required as the load unbalanced degree increases. It can be seen that a three-phase four-leg converter and a three-phase four-wire converter have both advantages and disadvantages characteristics in the power system. In order to resolve the disadvantages mentioned above of previous three-phase four-wire converters, a balance circuit is introduced to the two-level three-phase four-wire converter, combining the former two, i.e., split DC link with the additional fourth leg. The balance circuit is controlled to balance the capacitor voltages and reduce the capacitor voltage ripple by forcing the neutral current to flow through the balance circuit inductor ⁽⁹⁾. This allows significantly reducing the capacitance of DC-link capacitors. Leakage current passes through the ground and the photovoltaic array in a solar system, resulting in increased radiated electromagnetic emissions, increased current harmonics and losses, and reduced reliability of converter topologies. The neutral connection between the neutral load and the mid-point of DC-link capacitors contributes to the reduction of terminal voltage ripple to the ground. It means that with this topology, the leakage current is significantly reduced ^(10,11).

The three-phase legs of the two-level three-phase four-wire converter are totally decoupled, allowing for independent control of each phase converter. This allows for the implementation of ATC through unevenly loading each phase of the converter. By changing the output power of each phase in accordance with the deterioration of power semiconductor components, the lifetime of converter can be prolonged, as indicated earlier. In this paper, an ATC approach based per-phase power control in the two-level three-phase four-wire converter with balanced circuit is presented. An MPC approach for the two-level three-phase four-wire converter with balanced circuit is investigated in terms of per-phase control capability. An improved balance circuit control scheme is proposed using a modified cost function with a neutral current feed-forward term to reduce the capacitor voltage ripple. Additionally, a CBPWM-based controller using per-phase voltage and current control is also presented. Both MPC and CBPWM-based controllers are investigated in this paper regarding regulating power capability in each phase leg. This paper presents the comprehensive study of the two-level three-phase four-wire converter with balance circuit. The ATC method, including MPC and CBPWM-based controllers, is investigated to evaluate the capability of regulating phase leg output power depending on its aging condition. The simulation and experiment are conducted to confirm the operation of the ATC strategy based per-phase control in the two-level three-phase four-wire converter with balance circuit.

2. Description of the two-level three-phase four-wire converter with balance circuit

3. MPC-based controller

The two-level three-phase four-wire converter with balance circuit, connected to $R-L$ load, shown in Fig. 2, is considered to generate the mathematical model of the converter. As indicated previously, the relationship among the switching states and load voltage is expressed in (1). The three control signals $S_{a}$, $S_{b}$, $S_{c}$ from a total of 8 (23) switching states. The valid switching states with the corresponding output voltage in each phase are presented in Table 1.

Assuming that the capacitor voltages are balanced at nominal value $V_{dc}/2$. Each phase of the two-level three-phase four-wire converter can be analyzed separately. To implement ATC by adjusting the output power in each phase leg, the MPC scheme is realized in $abc-$ frame instead of $dq-$ frame as conventional MPC. By applying the Kirchhoff voltage law to Fig. 2, the output voltages of the converter can be described corresponding to $R-L$ load and the output currents ($i_{a}$, $i_{b}$, $i_{c}$).

The continuous-time expression for the output current can be derived from(2) as

Based on this, eq. (3) can be expressed in a discrete-time model by predicting the next sampling instant of output current following

As shown in (4), the predicted output current in $k+1$ sampling instant requires the output current and output voltage in $k$th instant. The output voltage prediction is generated using the 8 switching states and the DC-link voltage, as indicated in (1).

In the final stage, the predicted output currents in $i_{x}(k+1)(x=a,\:b,\:c)$ are compared to the corresponding reference $i_{a}^{*}(k+1)(x=a,\:b,\:c)$, in a natural reference frame making use of cost function $g_{1}$ as follows:

The optimal switching state is one that minimizes the cost function $g_{1}$. The cost function $g_{1}$ includes three terms regarding three phases output currents. Different current references can be used to regulate the output power in the corresponding phase leg. It is the same as in indicated per-phase power current control method, the current reference for the most aged phase leg can be even reduced to zero to decrease the power losses. The reliability and lifetime of the converter will be improved.

The $k+1$ sampling instant of the output current references, is obtained by making use of the fourth-order Lagrange extrapolation formula as:

The balance circuit can be described using two differential equations. One is the balance circuit inductor current dynamics, and the other is capacitor voltage dynamics. They are expressed as follows:

where $L_{N}$ is the balance circuit inductance, $C_{1}$ and $C_{1}$ are the upper and lower DC-link capacitors, respectively. The balance circuit inductor current $i_{\ln}$, the capacitor voltages $v_{C1}$ and $v_{C2}$, the capacitor current $i_{C}$, and neutral current $i_{N}$ correspond to variables defined in Fig. 2. The neutral voltage $v_{N}$ respected to negative DC-link can be obtained as $v_{N}=V_{dc}\times S_{r}$, where $S_{r}$ denotes the balance circuit switching states, i.e., $S_{r}=1$ when the upper switch is ON, and $S_{r}=0$ when the upper switch is off. Considering the constraint of DC-link voltage $v_{C1}+v_{C2}=V_{dc}$, $i_{\ln}$ and $v_{C2}$ are selected as the state variables. Equations (7) and (8) can be expressed as:

The discrete-time equations of the balance circuit inductor current and lower capacitor voltage can be achieved from (9), as demonstrated below:

It should be noted that the goal of controlling balance circuit is to maintain the upper and lower capacitor voltage at nominal value. The lower capacitor voltage $v_{C2}$ is compared with the corresponding reference $v_{C}^{*}=V_{dc}/2$, using the cost function

The MPC scheme of the two-level three-phase four-wire converter with balance circuit is depicted in Fig. 4.

Regarding balance circuit control, it is noticed that the neutral current $i_{N}$ impacts on the capacitor voltages. Consequently, a neutral current feed-forward term is presented and added to the cost function in (14) to form a modified cost function as follows:

where $K_{i}$ is the gain of the neutral current feed-forward term. Different value of $K_{i}$ will be to evaluate the effect of neutral current feed-forward term on the capacitor voltage ripple. The structure of MPC for balance circuit control with neutral current feed-forward term is depicted in Fig. 5.

4. CBPWM-based controller

5. Verification results

The simulation results verify the MPC scheme for the two-level three-phase four-wire converter with balance circuit is presented in this section. As depicted in the previous section, the two-level three-phase four-wire converter with balance circuit is connected to $R-L$ load, as shown in Fig. 2, which is modeled in PSIM software. The MPC is implemented following the given structure in Fig. 4. The converter system is characterized by the following parameters listed in Table 2.

In this simulation, three unbalanced operation cases are considered regarding ATC for each converter phase leg. The simulation results of the two-level three-phase four-wire converter with balance circuit using MPC under unbalanced operation where the output power in each phase is different, are presented in Fig. 8. In the first case, assuming that phase legs $c$ is the most aged, the output power of that phase $c$ should be decreased to reduce the power losses and extend the corresponding lifetime. Fig. 8(a) shows the waveforms of output currents, capacitor voltages, neutral current, and measured output power in the first case. In this case, the output power in phase $a$ and $b$ is kept the same at 3.3kW, whereas the output power in phase $c$ is reduced to 1kW. The output current waveforms are sinusoidal with the correct magnitude and phase following the output power. The capacitor voltages are kept balanced at the nominal value $V_{dc}/2$. The simulation waveforms of the second case, where phase $b$ and $c$ are the most aged, is presented in Fig. 8(b). In this case, the output power in phase $b$ and $c$ is reduced to 1kW, whereas the output power in phase $a$ is 3.3kW. As can be observed. the output currents are sinusoidal with the correct magnitude and phase following the output power. The capacitor voltages are kept balanced at the nominal value $V_{dc}/2$. In the third case, assuming that three phase legs have different aging conditions, resulted in different output power as shown in Fig. 8(c). Apparently, the output currents are sinusoidal with the correct magnitude and phase following the output power where Pa = 3.3kW, Pb = 2kW, and Pc = 1kW.

As shown in (12), the modified cost function is used to decrease the capacitor voltage peak-to-peak value, as indicated earlier. Fig. 9(a) - (c) show the simulation results using a modified cost function with the gain $K_{i}=-0.2$. As can be observed, the output currents are the same as using the conventional cost function in (11). It can be seen that the capacitor voltage peak-to-peak value is reduced by about 20\% in both three cases of unbalanced operation. Meanwhile, the output currents are sinusoidal with correct phase and magnitude as using the conventional cost function. Therefore, the modified cost function of balance circuit control reduces the capacitor voltage ripple without deteriorating the converter performance.

The simulation results show that the ATC approach based MPC scheme can solve the unbalanced operation and extend the lifetime of a specific phase leg by adjusting the corresponding output power. The two-level three-phase four-wire converter with balance circuit operates correctly in both three cases of unbalanced operation.

The simulation results of the two-level three-phase four-wire converter with balance circuit using CBPWM based per-phase voltage current control under unbalanced operation where the output power in each phase is different, are presented in Fig. 10(a) – (c). Similar to the MPC scheme, in both three cases of unbalanced operation, the output currents are sinusoidal with correct phase and magnitude corresponding to the output power.

The experiment is conducted using a down-scaled prototype of the two-level three-phase four-wire converter with balance circuit. Fig. 11(a) – (c) shows the experimental waveforms of output currents and lower capacitor voltage in different cases of output power. As can be observed, the output currents are sinusoidal with correct magnitude and phase following the output power. The capacitor voltage is maintained at the nominal value $V_{dc}/2$.

The simulation and experimental results show that the per-phase power current control scheme can solve the unbalanced operation and serve as an ATC strategy to extend the lifetime of a specific phase leg by adjusting the corresponding output power.

6. Conclusion

This paper presents the ATC approach to regulate the output power in each phase leg depending on the aging condition for the two-level three-phase four-wire converter with balance circuit. The output power in each phase is controlled to reduce the stress for the most aged phase leg. The MPC strategy is for the two-level three-phase four-wire converter with balance circuit. The three-phase converter cost function includes three separate current control terms, which allows independently regulating the output power in each phase by changing the current reference. This contributes to increasing the lifetime of desired phase leg by adjusting the corresponding power losses. Using the neutral current feed-forward term, the modified cost function is proposed to improve the capacitor voltage control capability by reducing the capacitor voltage ripple without deteriorating the converter performance. The CBPWM based per-phase voltage current control is investigated in terms of regulating output power in each phase depending on the aging condition. The simulation and experiment results show that ATC approaches based MPC and CBPWM operated correctly in unbalanced operation.