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References

1 
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2 
T. S. Ustun, J. Hashimoto, K. Otani, "Impact of Smart Inverters on Feeder Hosting Capacity of Distribution Networks," IEEE Access, vol. 7, pp. 163526-163536, 2019. DOI
3 
P. Rodriguez, J. Pou, J. Bergas, J. I. Candela, R. P. Burgos, D. Boroyevich, "Decoupled Double Synchronous Reference Frame PLL for Power Converters Control," IEEE Transactions on Power Electronics, vol. 22, no. 2, pp. 584-592, 2007. DOI
4 
S. Golestan, M. Ramezani, J. M. Guerrero, F. D. Freijedo, M. Monfared, "Moving Average Filter Based Phase-Locked Loops: Performance Analysis and Design Guidelines," IEEE Transactions on Power Electronics, vol. 29, no. 6, pp. 2750-2763, 2014. DOI
5 
Y. F. Wang, Y. W. Li, "Grid Synchronization PLL Based on Cascaded Delayed Signal Cancellation," IEEE Transactions on Power Electronics, vol. 26, no. 7, pp. 1987-1997, 2011. DOI
6 
B. Hoepfner, R. Vick, "A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort," IEEE Access, vol. 11, pp. 34932-34941, 2023. DOI
7 
E. Robles, S. Ceballos, J. Pou, J. L. Martín, J. Zaragoza, P. Ibañez, "Variable-Frequency Grid-Sequence Detector Based on a Quasi-Ideal Low-Pass Filter Stage and a Phase-Locked Loop," IEEE Transactions on Power Electronics, vol. 25, no. 10, pp. 2552-2563, 2010. DOI
8 
J. D. Lee, H. J. Cha, "The Design of Robust DSC-PLL under Distorted Grid Voltage Contained Unbalance on Frequency Variation," The Transactions of the Korean Institute of Electrical Engineers, vol. 67, no. 11, pp. 1447-1454, 2018. Google Search
9 
R. H., M. K. Mishra, "An Integrated Control of Enhanced-PLL and Synchronverter for Unbalanced Grid," IEEE Transactions on Industry Applications, vol. 58, no. 2, pp. 2206-2216, 2022. DOI
10 
M. Mirhosseini, J. Pou, V. G. Agelidis, E. Robles, S. Ceballos, "A Three-Phase Frequency-Adaptive Phase-Locked Loop for Independent Single-Phase Operation," IEEE Transactions on Power Electronics, vol. 29, no. 12, pp. 6255-6259, 2014. DOI